A 240 GHz Multiplier Chain with-0.5 dBm Output Power in SiGe BiCMOS Technology

被引：0
|
作者：
Ben Yishay, Roee [1 ]
Elad, Danny [1 ]
机构：
[1] IBM Haifa Res Lab, IL-31905 Haifa, Israel
来源：
2014 9TH EUROPEAN MICROWAVE INTEGRATED CIRCUIT CONFERENCE (EUMIC) | 2014年
关键词：
D-Band; H-Band: SiGe BiCMOS; Power Amplifier; Frequency Doubler;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 240GHz x4 frequency multiplier chain implemented in a f(T)/f(MAX) = 200/250GHz commercially available 0.12um SiGe BiCMOS technology is presented. The chain achieves a peak output power of -0.5dBm (0.9mW) and consists of two balanced doublers driven by a differential two stages cascode power amplifier. It operates from 232GHz to 246GHz (3 dB power bandwidth) with 5dBm input power at 60GHz and consumes a total DC power of 520mW. The D-Band PA achieves output ldB compression point and saturated power of 11.2 and 15.3dBm, respectively at 120GHz and 15.5dB small signal gain.
引用
收藏
页码：297 / 300
页数：4
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