Packaging assessment of porous ultra low-k materials

被引：16

作者：

Rasco, M ^{[1
]}

Mosig, K ^{[1
]}

Ling, JM ^{[1
]}

Elenius, P ^{[1
]}

Augur, R ^{[1
]}

机构：

[1] Int Sematech, Austin, TX 78741 USA

来源：

PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2002年

关键词：

D O I：

10.1109/IITC.2002.1014905

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The need for lower effective dielectric constants for both inter- and intra-layer dielectrics is clearly stated in the International Technology Roadmap for Semiconductors (1). Recently some progress has been reported with regards to integration and reliability assessment of these new, relatively weak porous ultra low-k materials (2-4). Due to their mechanical weakness, these materials also present unique challenges to the packaging process. If no appropriate precautions are taken, the parts cannot be packaged at all. In this paper first results are presented for packaging of a porous ultra low-k material with different integration schemes, employing three assembly techniques: flip chip, gold ball bonding, and aluminum wedge bonding. All of these assembly techniques achieved good assembly yields when proper integration schemes were used.

引用

页码：113 / 115

页数：3

共 5 条

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