A neuromorphic implementation of multiple spike-timing synaptic plasticity rules for large-scale neural networks

被引:24
作者
Wang, Runchun M. [1 ]
Hamilton, Tara J. [1 ]
Tapson, Jonathan C. [1 ]
van Schaik, Andre [1 ]
机构
[1] Univ Western Sydney, MARCS Institute, Sydney, NSW 2747, Australia
基金
澳大利亚研究理事会;
关键词
mixed-signal implementation; synaptic plasticity; STDP; STDDP; analog VLSI; time-multiplexing; dynamic-assigning; neuromorphic engineering; DELAY-CIRCUIT; NEURONS; CORTEX; MODEL; SIGNAL; POTENTIATION; SPINNAKER; SYNAPSES; ARRAY;
D O I
10.3389/fnins.2015.00180
中图分类号
Q189 [神经科学];
学科分类号
071006 ;
摘要
We present a neuromorphic implementation of multiple synaptic plasticity learning rules, which include both Spike Timing Dependent Plasticity (STDP) and Spike Timing Dependent Delay Plasticity (STDDP). We present a fully digital implementation as well as a mixed-signal implementation, both of which use a novel dynamic-assignment time-multiplexing approach and support up to 2(26) (64M) synaptic plasticity elements. Rather than implementing dedicated synapses for particular types of synaptic plasticity, we implemented a more generic synaptic plasticity adaptor array that is separate from the neurons in the neural network. Each adaptor performs synaptic plasticity according to the arrival times of the pre- and post-synaptic spikes assigned to it, and sends out a weighted or delayed pre-synaptic spike to the post-synaptic neuron in the neural network. This strategy provides great flexibility for building complex large-scale neural networks, as a neural network can be configured for multiple synaptic plasticity rules without changing its structure. We validate the proposed neuromorphic implementations with measurement results and illustrate that the circuits are capable of performing both STDP and STDDP. We argue that it is practical to scale the work presented here up to 2(36) (64G) synaptic adaptors on a current high-end FPGA platform.
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页数:17
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