System-on-a-Chip Design as a Platform for Teaching Design and Design Flow Integration

被引:3
|
作者
Covey, Jacob [1 ]
Johnson, Mark C. [1 ]
机构
[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
来源
GLSVLSI '19 - PROCEEDINGS OF THE 2019 ON GREAT LAKES SYMPOSIUM ON VLSI | 2019年
关键词
Design Flow; Engineering Education; Integration; Industry; System-on-Chip; VLSI;
D O I
10.1145/3299874.3318000
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The design of microelectronic systems requires integration and cooperation across multiple disciplines, but most curriculum is taught in unconnected pieces. This makes the creation of manageable projects that reflect the design experience very difficult. The System-on-a-Chip Extension Technologies (SoCET) group is an undergraduate design group modelled after industry. SoCET is a multi-semester project of primarily undergraduate students in the process of iteratively improving, prototyping, fabricating, and testing an SoC. The group recently taped out its fourth iteration of the SoC and submitted it for fabrication. Students on the SoCET team are divided into smaller groups which focus on specific SoC design tasks. These tasks are connected by a near industry grade design flow forcing students to address system and design flow integration issues. This framework enables students to approach engineering as an integrative process and learn relationships between seemingly separate disciplines.
引用
收藏
页码:249 / 253
页数:5
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