Multistage detectors in asynchronous CDMA systems

The demand of detectors able to efficiently mitigate crosstalk for large CDMA systems has led to the analysis of reduced rank detectors, especially multistage detectors. The increasing interest for this class of detectors is due to at least two reasons. Firstly, a low number of stages is sufficient for near-LMMSE performance, even as the system size grows large. Secondly, implementations with the same order of complexity of the single user matched filter are possible with random spreading using asymptotic weighting. However, the literature for linear detectors is mainly focused on synchronous systems and the multistage detectors have not been object of analysis in asynchronous scenarios yet. As known, the performance of the linear MMSE detector are lower in symbol asynchronous but chip synchronous systems than in synchronous systems due to the finite observation window. We propose the structure of a multistage detector whose performance in chip synchronous but chip synchronous scenarios equals the one of the multistage detector for synchronous systems. For completely asynchronous systems we adopt a fractionally spaced multistage detector with the structure mentioned above. A method to determine the asymptotic weights in case of fractionally spaced data input is presented and the performance of the corresponding asymptotic detector are assessed.