Modular Petri Net Processor for Embedded Systems

被引：1
作者：
Micolini, Orlando [1 ]
Daniele, Emiliano N. [1 ]
Ventre, Luis O. [1 ]
机构：
[1] Univ Nacl Cordoba, Lab Arquitectura Comp LAC FCEFyN, Cordoba, Argentina
来源：
COMPUTER SCIENCE (CACIC 2017) | 2018年 / 790卷
关键词：
Petri Processor; Petri Net; FPGA; IP core Heterogeneous multi-core processor;
D O I：
10.1007/978-3-319-75214-3_19
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
Reactive and concurrent embedded systems execute restricted algorithms depending on the requirements. It is possible to implement one of these hardware-software systems by using a Petri Net Processor. If logic and policy are decoupled from the system actions, then we can improve maintainability and system validation. To achieve this, the Petri Processor is integrated with other traditional processors, forming a heterogeneous multi-core processor, which allows to verify the system using Petri Net mathematical formalisms. In this article, a Modular Petri Processor Architecture is exposed, as well as the inclusion of programmable queues that enhance maintainability, module re-usage and semantic extension.
引用
收藏
页码：199 / 208
页数：10
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