Influence of 2D electrostatic effects on the high-frequency noise behaviour of sub-100 nm scaled MOSFETs

In this work, we have performed an investigation of the consequences of dowscaling the bulk MOSFET beyond the 100 nm range by means of a particle-based Monte Carlo simulator. Taking a 250 nm gate-length ideal structure as the starting point, the constant field scaling rules (also known as "classical" scaling) are considered and the high-frequency dynamic and noise performance of transistors with 1.30 nm, 90 nm and 60 nm gate-lengths are studied in depth. The analysis of internal quantities such as electric fields, velocity and energy of carriers or conduction band profiles shows the increasing importance of electrostatic two-dimensional effects due to the proximity of source and drain regions even when the most ideal bias conditions are imposed. As a consequence, a loss of the transistor action for the smallest MOSFET and the degradation of the most important high-frequency figures of merit is observed. Whereas the comparative values of intrinsic noise sources (S-ID, S-IG) are improved when reducing the dimensions and the bias voltages, the poor dynamic performance yields an overall worse noise behaviour than expected (especially for R-n and G(ass)), limiting at the same time the useful bias ranges and conditions for a proper low-noise configuration.