Higher order autocorrelation vision chip

被引:24
作者
Ishii, Idaku [1 ]
Yamamoto, Kenkichi [1 ]
Kubozono, Munehiro [1 ]
机构
[1] Hiroshima Univ, Hiroshima 7398511, Japan
关键词
counting objects; higher order local autocorrelation (HLAC); integrated architecture; moment features; target recognition; vision chip;
D O I
10.1109/TED.2006.878024
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes very large scale integration implementation using a new vision chip architecture specialized for target tracking and recognition. A 64 x 64 pixel prototype vision chip and its evaluation results are shown. The extraction algorithms of both higher order local autocorrelation (HLAC) features and moment features are implemented on the prototype chip in order to achieve high-speed image processing and enhanced pixel integration. The chip is integrated on a 5.00 mm x 5.00 mm chip using a 0.35-mu m CMOS DLP/TLM process; the pixel size is 44.2 mu m x 48.3 mu m. The maximum current consumption is approximately 400 mA, and the chip can calculate all HLAC features more than 26 times in 1 ms. The experimental results also demonstrate that the chip can successfully recognize and count high-speed objects at real time.
引用
收藏
页码:1797 / 1804
页数:8
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