High-power Digital Envelope Modulator for a Polar Transmitter in 65nm CMOS

被引：6

作者：

Collados, Manel ^{[1
]}

van Zeijl, Paul T. M. ^{[2
]}

Pavlovic, Nenad ^{[1
]}

机构：

[1] NXP Semicond Res, High Tech Campus 37, NL-5656 AE Eindhoven, Netherlands

[2] Philips Res, NL-5656 AE Eindhoven, Netherlands

来源：

PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2008年

关键词：

D O I：

10.1109/CICC.2008.4672192

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, an 8-bit envelope modulator as part of a digital polar transmitter for Bluetooth and WLAN is demonstrated. The modulator performs digital-to-analog conversion, up-mixing and power amplification, allowing for an area-efficient, fully-integrated transmitter architecture. The circuit delivers 24.8dBm peak-power and 16.7dBm WLAN OFDM power with a mean EVM of 2.7% at 2GHz. The measured peak-power drain efficiency is 51% while the efficiency for OFDM is 24%. In Bluetooth EDR mode a 19.7dBm signal with 5%-rms, 13%-peak EVM, and 26% drain efficiency has been measured. The circuit is fabricated in CMOS 65nm with 50 angstrom thick-oxide devices and 2.5V power supply.

引用

页码：733 / +

页数：2

共 6 条

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