Using Simulink HDL Coder to implement a Fingerprint Recognition Algorithm into an FPGA

被引:1
作者
Arjona, Rosario [1 ]
Baturone, Iluminada [1 ]
机构
[1] Univ Seville, Inst Microelect Sevilla IMSE CNM, CSIC, Seville, Spain
来源
2020 XIV TECHNOLOGIES APPLIED TO ELECTRONICS TEACHING CONFERENCE (TAEE2020) | 2020年
关键词
fingerprint recognition; image processing; automated hardware design; FPGA implementation;
D O I
10.1109/taee46915.2020.9163790
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work describes a model-based hardware design flow which uses Simulink HDL Coder and Xilinx tools to implement a fingerprint recognition algorithm into a Virtex-6 FPGA. Students can learn how this automated hardware design flow reduces the time to create a prototype since only the high-level description is required. In addition, the fingerprint recognition application allows illustrating how typical processing blocks employed for image processing are used in the context of biometrics security.
引用
收藏
页数:7
相关论文
共 13 条
[1]  
Arjona R, 2015, 2015 IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGY (ICIT), P1554, DOI 10.1109/ICIT.2015.7125317
[2]   A hardware solution for real-time intelligent fingerprint acquisition [J].
Arjona, Rosario ;
Baturone, Iluminada .
JOURNAL OF REAL-TIME IMAGE PROCESSING, 2014, 9 (01) :95-109
[3]  
Arjona R, 2012, IEEE I C ELECT CIRC, P579, DOI 10.1109/ICECS.2012.6463556
[4]  
Chao G., 2005, P 11 INT C PAR DISTR
[5]  
Chung Y, 2005, LECT NOTES ARTIF INT, V3683, P374
[6]  
Fons F., 2007, P IEEE INT C PH D RE
[7]  
Fons F., 2011, J REAL TIME IMAGE PR, P1
[8]  
Fons M., 2005, P IEEE INT S IND EL
[9]  
Garcia M. L., 2006, P INT C FIELD PROGR
[10]  
Lopez M., 2008, P IEEE INT S IND EL