Stability Analysis of Multi-Phase Synchronization in Paralleled Buck Converters With Winner-Take-All and Loser-Take-All Switching Rules

被引:7
|
作者
Ohata, Toshiyasu [1 ]
Saito, Toshimichi [2 ]
机构
[1] Yokogawa Elect Corp, Tokyo 1808570, Japan
[2] Hosei Univ, Dept Elect & Elect Engn, Tokyo 1848584, Japan
关键词
Current sharing; multi-phase synchronization; paralleled power converters; ripple reduction; switched dynamical systems; switching power converters; DC-DC CONVERTERS; DYNAMICAL-SYSTEMS;
D O I
10.1109/JETCAS.2015.2462191
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper studies paralleled systems of buck converters with two kinds of switching rules. First, the system is controlled by the winner-take-all and current threshold switching rules. The system can generate stable multi-phase synchronization of inductor currents. As parameters vary, the multi-phase synchronization loses stability and the system exhibits a chaotic phenomenon in which unstable multi-phase synchronization is embedded. Second, the system is controlled by winner-take-all and loser-take-all switching rules. The system can generate stable multi-phase synchronization in a wide range of parameters: it is suitable to realize current-sharing and ripple reduction for low-voltage-high-current capabilities. In order to analyze the dynamics, we present simple piecewise linear models. Using the piecewise exact solutions, we prove stability of the synchronization phenomena and give a condition of parameters for the stability. We can also investigate the ripple characteristics precisely. Presenting simple test circuits, the stable synchronization phenomena are confirmed experimentally.
引用
收藏
页码:345 / 353
页数:9
相关论文
共 35 条
  • [1] Interleaved buck converters based on winner-take-all switching
    Saito, T
    Tasaki, S
    Torikai, H
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2005, 52 (08) : 1666 - 1672
  • [2] High-Precision Current-Mode Loser-Take-All & Winner-Take-All Circuits
    Hoseini, S. Zaniar
    Kosari, Amir
    Khoda, Johar Abde
    2011 INTERNATIONAL CONFERENCE ON FUZZY SYSTEMS AND NEURAL COMPUTING (FSNC 2011), VOL I, 2011, : 37 - 40
  • [3] Voltage-Mode Loser/Winner-Take-All Circuits
    Soleimani, Mohammad
    Nazaraliloo, Mohammad
    2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2011,
  • [4] Winner/loser-take-all circuits on SOI technology for neural network classification
    Duong, TA
    Saunders, C
    Ngo, T
    Daud, T
    APPLICATIONS AND SCIENCE OF COMPUTATIONAL INTELLIGENCE, 1998, 3390 : 367 - 377
  • [5] Analysis for a class of winner-take-all model
    Sum, JPF
    Leung, CS
    Tam, PKS
    Young, GH
    Kan, WK
    Chan, LW
    IEEE TRANSACTIONS ON NEURAL NETWORKS, 1999, 10 (01): : 64 - 71
  • [6] Analysis for a class of winner-take-all model
    Hong Kong Baptist Univ, Kowloon Tong, Hong Kong
    IEEE Trans Neural Networks, 1 (64-71):
  • [7] Collective Stability of Networks of Winner-Take-All Circuits
    Rutishauser, Ueli
    Douglas, Rodney J.
    Slotine, Jean-Jacques
    NEURAL COMPUTATION, 2011, 23 (03) : 735 - 773
  • [8] Winner-take-all in a phase oscillator system with adaptation
    Burylko, Oleksandr
    Kazanovich, Yakov
    Borisyuk, Roman
    SCIENTIFIC REPORTS, 2018, 8
  • [9] Winner-take-all in a phase oscillator system with adaptation
    Oleksandr Burylko
    Yakov Kazanovich
    Roman Borisyuk
    Scientific Reports, 8
  • [10] A winner-take-all evaluation in data envelopment analysis
    Yang, Feng
    Jiang, Lijing
    Ang, Sheng
    ANNALS OF OPERATIONS RESEARCH, 2019, 278 (1-2) : 141 - 158