4 Gbps high-density AC coupled interconnection (Invited paper)

被引:60
作者
Mick, S [1 ]
Wilson, J [1 ]
Franzon, P [1 ]
机构
[1] N Carolina State Univ, Dept Elect & Comp Engn, Raleigh, NC 27695 USA
来源
PROCEEDINGS OF THE IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2002年
关键词
D O I
10.1109/CICC.2002.1012783
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
AC coupled interconnects enable multi-gigabit-per-second communication data rates between integrated circuits with very high pin counts and low power consumption, AC coupling can be realized with either series capacitive or inductive coupling elements. Capacitive AC coupling offers better performance when low power I/O buffers are required and when there is sufficient area to dedicate to coupling capacitors in the top-level metal of each IC. At a slight expense of circuit complexity, inductive AC coupling can be used to bring I/O pad pitches down to 75 mum and maintain a controlled impedance connection. A novel physical structure, buried solder bumps, are used as a solution for providing DC power and ground connections across the same surface as the AC connections. When used in conjunction with NRZ-tolerate receivers, and current-mode signaling, highly effective interconnect structures can be built. As well as presenting, both physical and circuit aspects of this work, experimental results are shown.
引用
收藏
页码:133 / 140
页数:4
相关论文
共 12 条
  • [1] The Mini Flex Ball-Grid-Array Chip-Scale Package
    Ang, S
    Meyer, D
    Thach, T
    Schaper, L
    Brown, WD
    [J]. 2ND ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, PROCEEDINGS, 1998, : 13 - 17
  • [2] ARABI T, 1998, MODELING SIMULATION, P8
  • [3] A smart card CMOS circuit with magnetic power and communications interface
    Bouvier, J
    Thorigne, Y
    AbouHassan, S
    Revillet, MJ
    Senn, P
    [J]. 1997 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 1997, 40 : 296 - 297
  • [4] FINKENZELLER K, 1999, RFID HDB R
  • [5] GABARA T, 1997, IEEE J SOLID STATE C, V32
  • [6] GLASSER LA, MAGNETIC POWER COMMU
  • [7] HIGH-SPEED CMOS I/O BUFFER CIRCUITS
    ISHIBE, M
    OTAKA, S
    TAKEDA, J
    TANAKA, S
    TOYOSHIMA, Y
    TAKATSUKA, S
    SHIMIZU, S
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (04) : 671 - 673
  • [8] Knight T., 1990, CAPACITIVE CHIP CHIP
  • [9] KUHN SA, 1995, IEEE INT SYMP CIRC S, P37, DOI 10.1109/ISCAS.1995.521445
  • [10] POULTON J, 1999, SIGNALING HIGH PERFO