A 57-66 GHz Medium Power Amplifier in 65-nm CMOS Technology

被引：0

作者：

Hsieh, Chia-Yu ^{[1
]}

Kuo, Jhe-Jia

Tsai, Zuo-Min

Lin, Kun-You

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, 1,Sec 4,Roosevlt Rd, Taipei 10617, Taiwan

来源：

2010 ASIA-PACIFIC MICROWAVE CONFERENCE | 2010年

关键词：

Broadband; CMOS; 60; GHz; MMIC; power amplifiers;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the design and measurement results of a 57-66 GHz medium power amplifier in 65-nm LP CMOS process. This amplifier is designed with broadband matching concern, which can achieve a measured gain more than 21 dB from 57-66 GHz and have a 3-dB bandwidth more than 14 GHz while consuming 54 mW from a 1.2 V supply. The measured results exhibit P-sat of 10.3 dBm, P-1dB of 6.2 dBm, and the peak PAE is 16 % at 58 GHz. The chip size is only 0.3 mm(2).

引用

页码：1617 / 1620

页数：4

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