PA AND LNA FOR MILLIMETER-WAVE WPAN USING 90 nm CMOS PROCESS

We present the design and fabrication of power amplifier (PA) and low noise amplier (LNA) in 60 GHz using 90 nm CMOS process. Both of theta hat e three stages topology. We obtained small signal gain of 21 dB, P-1dB of 4 dBm, and input/output return losses of < -9 dB in PA. We also obtained small sigiial gain of 25 dB, noise figure of <7 dB, P-1dB, of 1.5 dBm, input/out return losses of < -8 dB in LNA. The die sizes of PA and LNA are 1.1 X 0.8 mm(2) and 0.59 X 0.78 mm(2), respectively. Both sizes contain the RF pads and bias pads. Especially, the size of LNA is reduced by using hairpin type matching structure. (C) 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2029-2032, 2009; published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24549