Synaptic Characteristics of Ag/AgInSbTe/Ta-Based Memristor for Pattern Recognition Applications

被引:94
作者
Zhang, Yang [1 ]
Li, Yi [2 ,3 ]
Wang, Xiaoping [1 ]
Friedman, Eby G. [4 ]
机构
[1] Huazhong Univ Sci & Technol, Sch Automat, Wuhan 430074, Hubei, Peoples R China
[2] Huazhong Univ Sci & Technol, Sch Opt & Elect Informat, Wuhan 430074, Peoples R China
[3] Huazhong Univ Sci & Technol, Wuhan Natl Lab Optoelect, Wuhan 430074, Peoples R China
[4] Univ Rochester, Dept Elect & Comp Engn, Rochester, NY 14627 USA
基金
中国国家自然科学基金;
关键词
Crossbar array; memristor; multilayer neural networks (MNNs); pattern recognition; synaptic weight; ELECTRONIC SYNAPSE; REDUCTION; DESIGN; SYSTEM; MEMORY;
D O I
10.1109/TED.2017.2671433
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The memristor, a promising candidate for synaptic interconnections in artificial neural network, has gained significant attention for application to neuromorphic systems. One common method is using two memristors as one synapse to represent the positive and negative weights. In this paper, the synaptic behavior of a Ag/AgInSbTe/Ta (AIST)-based memristor is experimentally demonstrated. In addition, a neural architecture using one AIST memristor as a synapse is proposed, where both the plus and minus weights of the neural synapses are realized in a single memristive array. Moreover, the memristor-based neural network is extended to a multilayer architecture, and modified memristor-based backpropagation learning rules are implemented on-chip to achieve pattern recognition. The effects of device variations and input noise on the performance of a memristor-based multilayer neural network (MNN) are also described. The proposed MNN is capable of pattern recognition with high success rates and exhibits several advantages, such as good accuracy, high robustness, and noise immunity.
引用
收藏
页码:1806 / 1811
页数:6
相关论文
共 31 条
[1]   Write current reduction in transition metal oxide based resistance-change memory [J].
Ahn, Seung-Eon ;
Lee, Myoung-Jae ;
Park, Youngsoo ;
Kang, Bo Soo ;
Lee, Chang Bum ;
Kim, Ki Hwan ;
Seo, Sunae ;
Suh, Dong-Seok ;
Kim, Dong-Chirl ;
Hur, Jihyun ;
Xianyu, Wenxu ;
Stefanovich, Genrikh ;
Yin, Hit. Axiang ;
Yoo, In-Kyeong ;
Lee, Atng-Hyun ;
Park, Jong-Bong ;
Baek, In-Gyu ;
Park, Bae Ho .
ADVANCED MATERIALS, 2008, 20 (05) :924-+
[2]   Pattern classification by memristive crossbar circuits using ex situ and in situ training [J].
Alibart, Fabien ;
Zamanidoost, Elham ;
Strukov, Dmitri B. .
NATURE COMMUNICATIONS, 2013, 4
[3]   Modeling of Set/Reset Operations in NiO-Based Resistive-Switching Memory Devices [J].
Cagli, Carlo ;
Nardi, Federico ;
Ielmini, Daniele .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (08) :1712-1720
[4]   Two-dimensional analytical Mott-Gurney law for a trap-filled solid [J].
Chandra, W. ;
Ang, L. K. ;
Pey, K. L. ;
Ng, C. M. .
APPLIED PHYSICS LETTERS, 2007, 90 (15)
[5]   Insertion of a Si layer to reduce operation current for resistive random access memory applications [J].
Chen, Yu-Ting ;
Chang, Ting-Chang ;
Peng, Han-Kuang ;
Tseng, Hsueh-Chih ;
Huang, Jheng-Jie ;
Yang, Jyun-Bao ;
Chu, Ann-Kuo ;
Young, Tai-Fa ;
Sze, Simon M. .
APPLIED PHYSICS LETTERS, 2013, 102 (25)
[6]   Data Clustering using Memristor Networks [J].
Choi, Shinhyun ;
Sheridan, Patrick ;
Lu, Wei D. .
SCIENTIFIC REPORTS, 2015, 5
[7]   Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron [J].
Chu, Myonglae ;
Kim, Byoungho ;
Park, Sangsu ;
Hwang, Hyunsang ;
Jeon, Moongu ;
Lee, Byoung Hun ;
Lee, Byung-Geun .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2015, 62 (04) :2410-2419
[8]   Complex Learning in Bio-plausible Memristive Networks [J].
Deng, Lei ;
Li, Guoqi ;
Deng, Ning ;
Wang, Dong ;
Zhang, Ziyang ;
He, Wei ;
Li, Huanglong ;
Pei, Jing ;
Shi, Luping .
SCIENTIFIC REPORTS, 2015, 5
[9]   Memristive crypto primitive for building highly secure physical unclonable functions [J].
Gao, Yansong ;
Ranasinghe, Damith C. ;
Al-Sarawi, Said F. ;
Kavehei, Omid ;
Abbott, Derek .
SCIENTIFIC REPORTS, 2015, 5
[10]   Low-Power VDD/3 Write Scheme With Inversion Coding Circuit for Complementary Memristor Array [J].
Ham, Seok-Jin ;
Mo, Hyun-Sun ;
Min, Kyeong-Sik .
IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2013, 12 (05) :851-857