Modeling and Electrical Performance Optimization of p-type SnO-based Cylindrical Thin-film Transistors

被引：1

作者：

Akkili, Viswanath G. ^{[1
]}

Srivastava, Viranjay M. ^{[1
]}

机构：

[1] Univ KwaZulu Natal, Howard Coll, Dept Elect Engn, ZA-4041 Durban, South Africa

来源：

2021 PHOTONICS & ELECTROMAGNETICS RESEARCH SYMPOSIUM (PIERS 2021) | 2021年

关键词：

MOBILITY;

D O I：

10.1109/PIERS53385.2021.9694996

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Scaling down is a significant issue in semiconductor devices because of its physical limitations. In this research article, Thin-Film Transistors (TFT) with cylindrical geometry have been modeled and simulated for a high electrical p-type response using a 3D numerical simulator. The workfunction is varied from 4.0 eV to 5.5 eV to analyze the performance of the simulated TFTs. The maximum field-effect mobility of 30.2 cm(2)/V-s has been attained for the 4.0 eV device followed by a low sub-threshold swing and On-Off current ratio of 368 mV/dec and 7.32 x 10(8), respectively. These values are comparable with the countertype TFT devices. By realizing the high electrical performance p-type CTFT, efficient CMOSlike logic circuits can be implemented.

引用

页码：834 / 838

页数：5

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