An interconnect architecture for networking systems on chips

被引:137
作者
Karim, F [1 ]
Nguyen, A
Dey, S
机构
[1] STMicroelect, Adv Syst Technol, Adv Comp Lab, San Diego, CA 92121 USA
[2] Univ Calif San Diego, Dept Elect & Comp Engn, San Diego, CA 92103 USA
关键词
D O I
10.1109/MM.2002.1044298
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Network processor systems on chips meet the speed and flexibility requirements of next-generation Internet routers. the octagon on-chip communication architecture, with its cost, performance, and scalability advantages, supports these network processor SOCs.
引用
收藏
页码:36 / 45
页数:10
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