Multi-wall channel transistor for p-type metal oxide semiconductor field-effect transistor performance improvement

被引:2
|
作者
Shido, Hideharu [1 ]
Fukuda, Masatoshi [1 ]
Mishima, Yasuyoshi [1 ]
机构
[1] Fujitsu Labs Ltd, Silicon Device Labs, Device & Mat Labs, Atsugi, Kanagawa 2430197, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS | 2006年 / 45卷 / 29-32期
关键词
PMOSFETs; hole mobility; multi-wall;
D O I
10.1143/JJAP.45.L783
中图分类号
O59 [应用物理学];
学科分类号
摘要
We demonstrate the enhanced hole mobility of p-channel metal oxide semiconductor field effect transistors (PMOSFETs) using a multi-wall structural channel. Multi-wall channels with a height of 35 nm and a width of 70 nm were prepared at 70-nm half-pitches. The multi-wall channel structure produces a (I 10) surface channel and a strain produced by polycrystalline silicon (poly-Si) gates. These enhance hole mobilities. The degree of enhancement depends on the wall height. We obtained a 45% increase in hole mobility with a 35-nm-high wall at 0.8 MV/cm.
引用
收藏
页码:L783 / L785
页数:3
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