Hybrid NRZ/Multi-Tone Serial Data Transceiver for Multi-Drop Memory Interfaces

被引：22
作者：
Gharibdoust, Kiarash [1 ]
Tajalli, Armin [2 ]
Leblebici, Yusuf [1 ]
机构：
[1] Ecole Polytech Fed Lausanne, Swiss Fed Inst Technol, CH-1015 Lausanne, Switzerland
[2] Kandou Bus SA, QI, CH-1015 Lausanne, Switzerland
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2015年 / 50卷 / 12期
关键词：
Decision-feedback equalizer (DFE); differential signaling; intersymbol interference (ISI); multi-drop bus (MDB); multi-tone signaling; nonreturn-to-zero (NRZ) signaling;
D O I：
10.1109/JSSC.2015.2483904
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 7.5 Gb/s mixed NRZ/multi-tone (NRZ/MT) transceiver for multi-drop bus (MDB) memory interfaces is designed and fabricated in 40 nm CMOS technology. Reducing the complexity of the equalization circuitry on the receiver (RX) side, the proposed architecture achieves 1 pJ/bit link efficiency for an MDB channel with 45 dB loss at 2.5 GHz. The transmitted spectrum is composed of baseband (BB) and I/Q sub-bands with the ability to match the modulation frequency of the entire transceiver (TRX) with respect to the channel response over a +/-25% range. A switched-capacitor-based mixer/filter is developed to efficiently down convert and equalize the I/Q sub-bands in the RX. The core size area is 85 x 60 mu m(2) and 150 x 60 mu m(2) for the TX and RX, respectively.
引用
收藏
页码：3133 / 3144
页数：12
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