Compensation and Calibration Techniques for Current-Steering DACs

Digital-to-analog converters (DACs) are pervasive, critical components for radios and various signal processing systems. Therefore, a myriad of research efforts, covering architectural, circuit, and technological aspects have been made towards improving the performance of DACs. However, the quest to achieve stringent dynamic linearity requirements (>70 dBc SFDR) over many gigahertz of bandwidth presents grand challenges to designers and high-yield manufacturers. In light of these challenges, various calibration and compensation techniques have evolved over the past two decades to overcome design and process technology variations and limitations. This paper provides the reader with an overview of the sources of nonlinearity in current-steering DACs and a holistic survey of compensation and calibration techniques. A historical overview of these techniques is presented, outlining the shift from amplitude to timing and dynamic corrections. Furthermore, several germane techniques are simulated within a 12-bit, 2GS/s baseline DAC to compare their efficacy. As synthesis frequencies approach the multi-GHz range, new architectures have emerged, prompting a final discussion on correction of current and emerging high performance DACs.