A Digital Monolithic Active Pixel Sensor Chip in a Quadruple-Well CIS Process for Tracking Applications

被引：10

作者：

Degerli, Y. ^{[1
]}

Bertolone, G. ^{[2
]}

Claus, G. ^{[2
]}

Dorokhov, A. ^{[2
]}

Dulinski, W. ^{[2
]}

Goffe, M. ^{[2
]}

Guilloux, F. ^{[1
]}

Hu-Guo, Ch ^{[2
]}

Jaaskelainen, K. ^{[2
]}

Morel, F. ^{[2
]}

Orsini, F. ^{[1
]}

Specht, M. ^{[2
]}

Winter, M. ^{[2
]}

机构：

[1] CEA Saclay, IRFU SEDI, Gif Sur Yvette, France

[2] IN2P3 ULP, IPHC, F-67037 Strasbourg, France

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2013年 / 60卷 / 05期

关键词：

Active pixel sensors; CMOS image sensors; CMOS integrated circuits; position sensitive particle detectors; SUPPRESSION; DESIGN;

D O I：

10.1109/TNS.2013.2280794

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A CMOS sensor chip for charged particle detection has been developed and submitted for fabrication in a 0.18 m Quadruple-Well (N& P-Wells, Deep N& P-Wells) CMOS Image Sensor (CIS) process. Improvement of the radiation hardness, the power dissipation and the readout speed of the mainstream CMOS sensors is expected with the exploration of this process. In order to ensure better charge collection and neutron tolerance, wafers with high-resistivity epitaxial layer have been chosen. In this paper a digital CMOS sensor prototype developed in order to validate the key analog blocks (from sensing element to 1-bit digital conversion) of a binary Monolithic Active Pixel Sensor (MAPS) in this process will be presented. The digital sensor prototype comprises four different sub-arrays of 20 m pitch 64 x 32 pixels, 128 column-level auto-zeroed discriminators, a sequencer and an output digital multiplexer. Laboratory tests results including the charge-to-voltage conversion factor, the charge collection efficiency, the temporal noise and the fixed-pattern noise are presented in details. Some irradiation results will also be given.

引用

页码：3899 / 3906

页数：8

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