A 10-Gb/s-18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13-μm CMOS

Avalanche photodetectors (APDs) improve the sensitivity of optoelectronic (O/E) receivers (RXs) due to their high multiplication gain and responsivity. When implemented monolithically with a CMOS transimpedance amplifier (TIA) on the same chip, they provide further advantages, such as low cost and reduced parasitics. However, APDs require high bias voltages, are sensitive to variations in operating conditions, and have a limited gain-bandwidth product. This paper presents an 850 nm APD implemented in a standard 0.13-mu m CMOS process with a responsivity of 3.92 A/W and a large-signal -3 dB bandwidth of 3.5 GHz. Advantages of on-chip integration with a TIA are described and a noise-canceling active balun following the single-ended TIA is presented. The O/E-RXs front-end achieves a measured sensitivity of -18.8 dBm, the best-reported among 10 Gb/s linear CMOS TIAs operating at 850 nm. The energy/bit is 0.57 pJ/b. An on-chip voltage booster is described and implemented to generate a large APD bias using nominal CMOS voltage supplies. A modified hill-climbing algorithm is also presented that can enable bias stabilization for the voltage booster and the optoelectronic front-end for a complete all-bulk-CMOS implementation.