A Wideband 400 MHz-to-4 GHz Direct RF-to-Digital Multimode ΔΣ Receiver

A wide-tuning-range low-power sigma-delta-based direct-RF-to-digital receiver architecture is implemented in 65 nm CMOS. A flat signal transfer function is chosen to support wide-frequency-range radios. A multilevel (two-bit) nonreturn-to-zero DAC improves jitter immunity to enable a high dynamic range, and, with a class-AB low-noise transconductance amplifier, guarantees a highly linear front end. For a 4 MHz signal, the peak SNDR of the receiver exceeds 68 dB and is better than 60 dB across the 400 MHz to 4 GHz carrier frequency range. By virtue of utilizing a negative feedback digitizer close to the antenna, an IIP3 of 10 dBm is achieved while dissipating only 40 mW from 1.1 V/1.5 V supply voltages.