A platform-based SoC hardware/software co-design environment

被引:0
|
作者
Xiong, ZH [1 ]
Li, SK [1 ]
Chen, JH [1 ]
Wang, DW [1 ]
机构
[1] Natl Univ Def Technol, Sch Comp Sci, Changsha 410073, Peoples R China
来源
PROCEEDINGS OF THE 8TH INTERNATIONAL CONFERENCE ON COMPUTER SUPPORTED COOPERATIVE WORK IN DESIGN, VOL 2 | 2004年
关键词
D O I
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中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper presents a Platform-based SoC hardware/software co-design environment named HSCDE. It introduces the overall structure of HSCDE, describes the Platform-based SoC system modeling technology, ant algorithm based hardware/software partitioning technology and Hierarchical Directed Acyclic Graph based performance constraint assignment technology. HSCDE supports Platform-based SoC hardware/software co-design methodology. It supports almost all the design phases from SoC system modeling to RTL level SoC system. It divides SoC hardware/software co-design into system modeling level (level 1), virtual components level (level 2) and real components level (level 3), and it performs the 2 mappings among the 3 design levels by Design Planning (mapping 1) and Virtual-Real Synthesis (mapping 2). We have done SoC system design for MP3 player SoC, MEPG2 player SoC and CDMA wireless communication SoC in HSCDE environment. Results show that HSCDE effectively supports Platform-based SoC hardware/software co-design methodology; it enhanced system reuse of existing SoC design. Statistics indicate an average of 10%similar to25% revisions on platform templates for a new SoC design, and we achieved platform template reuse ratio by 75%similar to90%.
引用
收藏
页码:443 / 448
页数:6
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