The power conscious Synergistic Processor Element of a Cell Processor

被引：1

作者：

Takahashi, Osamu ^{[1
]}

Cottier, Scott ^{[1
]}

Dhong, Sang H. ^{[1
]}

Flachs, Brian ^{[1
]}

Hirairi, Koji ^{[1
]}

Hofstee, H. Peter ^{[1
]}

Michael, Brad ^{[1
]}

Noro, Hiromi ^{[1
]}

Wendel, Dieter ^{[1
]}

White, Michael ^{[1
]}

机构：

[1] IBM Syst & Technol Grp, Austin, TX USA

来源：

2005 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS | 2005年

关键词：

D O I：

10.1109/ASSCC.2005.251779

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 4-way SIMD Streaming Processor of a Cell Processor is developed in a 90nm SOI technology. CMOS static gates implement the majority of the logic. Dynamic circuits are used in critical areas, occupying 19% of the non-SRAM area. ISA, micro-architecture, and physical implementation are co-optimized to achieve a compact and power efficient design.

引用

页码：21 / 24

页数：4