Effect of substrate bias in bulk and SOI sige-channel p-MOSFETs

被引:1
作者
Niu, GF
Ruan, G
机构
[1] Department of Electronic Engineering, Fudan University
关键词
D O I
10.1016/0038-1101(95)00151-4
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
[No abstract available]
引用
收藏
页码:305 / 307
页数:3
相关论文
共 11 条
[1]  
CHENEY W, 1985, NUMERICAL MATH COMPU
[2]  
COLINGE JP, 1990, SILICON INSULATOR TE
[3]   HOLE CONFINEMENT IN MOS-GATED GEXSI1-X/SI HETEROSTRUCTURES [J].
GARONE, PM ;
VENKATARAMAN, V ;
STURM, JC .
IEEE ELECTRON DEVICE LETTERS, 1991, 12 (05) :230-232
[4]   ANALYTICAL MODELING OF THRESHOLD VOLTAGES IN P-CHANNEL SI/SIGE/SI MOS STRUCTURES [J].
INIEWSKI, K ;
VOINIGESCU, S ;
ATCHA, J ;
SALAMA, CAT .
SOLID-STATE ELECTRONICS, 1993, 36 (05) :775-783
[5]   A GATE-QUALITY DIELECTRIC SYSTEM FOR SIGE METAL-OXIDE-SEMICONDUCTOR DEVICES [J].
IYER, SS ;
SOLOMON, PM ;
KESAN, VP ;
BRIGHT, AA ;
FREEOUF, JL ;
NGUYEN, TN ;
WARREN, AC .
IEEE ELECTRON DEVICE LETTERS, 1991, 12 (05) :246-248
[6]   HIGH-MOBILITY GESI PMOS ON SIMOX [J].
NAYAK, DK ;
WOO, JCS ;
YABIKU, GK ;
MACWILLIAMS, KP ;
PARK, JS ;
WANG, KL .
IEEE ELECTRON DEVICE LETTERS, 1993, 14 (11) :520-522
[7]   ENHANCEMENT-MODE QUANTUM-WELL GEXSI1-X PMOS [J].
NAYAK, DK ;
WOO, JCS ;
PARK, JS ;
WANG, KL ;
MACWILLIAMS, KP .
IEEE ELECTRON DEVICE LETTERS, 1991, 12 (04) :154-156
[8]   INVERSION CHARGE MODELING OF SIGE PMOS AND APPROACHES TO INCREASING THE HOLE DENSITY IN THE SIGE CHANNEL [J].
NIU, GF ;
RUAN, G ;
TANG, TA .
SOLID-STATE ELECTRONICS, 1995, 38 (02) :323-329
[9]  
PEOPLE R, 1985, APPL PHYS LETT, V47, P332, DOI DOI 10.1063/1.96206
[10]  
SZE SM, 1981, PHYSICS SEMICONDUCTO