A Fully-integrated 18 GHz Class-E Power Amplifier in a 45 nm CMOS SOI Technology

A fully-integrated Class-E power amplifier (PA) operating at 18 GHz is implemented in a standard 45 nm CMOS SOI technology. The PA is designed using differential Cascode topology with cross-coupled capacitors for Gate-Drain capacitance neutralization. The measured single-ended saturated power (P-SAT) under a supply voltage of 2 V is 15.9 dBm (differential P-SAT of 18.9 dB) and the 1-dB single-ended compression power (P-1dB) is 13.3 dBm, with a peak power added efficiency (PAE) of 41.4%. The Gate-Drain capacitance neutralization technique facilitates the class-E operation and improves the PAE by similar to 20%.