Partitioning-Based Reduction of Circuits with Mutual Inductances

被引：2

作者：

Miettinen, Pekka ^{[1
]}

Honkala, Mikko ^{[1
]}

Roos, Janne ^{[1
]}

Valtonen, Martti ^{[1
]}

机构：

[1] Aalto Univ, Sch Sci & Technol, Dept Radio Sci & Engn, POB 13000, FI-00076 Aalto, Finland

来源：

SCIENTIFIC COMPUTING IN ELECTRICAL ENGINEERING (SCEE 2010) | 2012年 / 16卷

关键词：

MODEL;

D O I：

10.1007/978-3-642-22453-9__42

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a novel model-order reduction (MOR) method to reduce the number of mutual inductances in conjunction with a recently proposed MOR algorithm, PartMOR. As the method produces passive mutual inductances as a reduction realization, it extends the existing RLC-in-RLC-out PartMOR to a RLCM-in-RLCM-out MOR method. The method is verified and compared to a well-known MOR method with test simulations and is shown to produce good reduction results in terms of CPU speed-up and generated error.

引用

页码：395 / 403

页数：9

共 10 条

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