Gradual bipolar resistive switching in Ni/Si3N4/n+-Si resistive-switching memory device for high-density integration and low-power applications
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作者:
Kim, Sungjun
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Seoul Natl Univ, ISRC, Seoul 151744, South Korea
Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 151744, South KoreaSeoul Natl Univ, ISRC, Seoul 151744, South Korea
Kim, Sungjun
[1
,2
]
Jung, Sunghun
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Seoul Natl Univ, ISRC, Seoul 151744, South Korea
Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 151744, South KoreaSeoul Natl Univ, ISRC, Seoul 151744, South Korea
Jung, Sunghun
[1
,2
]
Kim, Min-Hwi
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Seoul Natl Univ, ISRC, Seoul 151744, South Korea
Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 151744, South KoreaSeoul Natl Univ, ISRC, Seoul 151744, South Korea
Kim, Min-Hwi
[1
,2
]
Cho, Seongjae
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Gachon Univ, Dept Elect Engn, Songnam 461701, Gyeonggi Do, South KoreaSeoul Natl Univ, ISRC, Seoul 151744, South Korea
Cho, Seongjae
[3
]
Park, Byung-Gook
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Seoul Natl Univ, ISRC, Seoul 151744, South Korea
Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 151744, South KoreaSeoul Natl Univ, ISRC, Seoul 151744, South Korea
Park, Byung-Gook
[1
,2
]
机构:
[1] Seoul Natl Univ, ISRC, Seoul 151744, South Korea
[2] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 151744, South Korea
[3] Gachon Univ, Dept Elect Engn, Songnam 461701, Gyeonggi Do, South Korea
In this work, we report a gradual bipolar resistive switching memory device using Ni/Si(3)N(4/)n(+)-Si structure. Different reset transitions are observed depending on compliance current (I-COMP). The reset switching becomes abrupt around I-COMP = 10 mA, while gradual reset switching with fine controllability is preserved for the devices with I-COMP < 1 mA. We demonstrate multi-level cell (MLC) operation through the modulation of conducting path by controlling I-COMP and reset stop voltage (V-STOP) for I-COMP < 1 mA. For the devices with I-COMP = 10 mA, low resistance state (LRS) shows Ohmic behavior with metallic conducting paths, while high resistance state (HRS) shows non-Ohmic behavior. Also, it is revealed that LRS and HRS conductions follow space-charge-limited current (SCLC) mechanism in low I-COMP regime (I-COMP < 1 mA). (C) 2015 Elsevier Ltd. All rights reserved.
机构:
Samsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
Kim, Yoon
Seo, Joo Yun
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Seoul Natl Univ, ISRC, Seoul 151742, South Korea
Seoul Natl Univ, Dept Elect Engn & Comp Sci, Seoul 151742, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
Seo, Joo Yun
Lee, Sang-Ho
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Seoul Natl Univ, ISRC, Seoul 151742, South Korea
Seoul Natl Univ, Dept Elect Engn & Comp Sci, Seoul 151742, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
Lee, Sang-Ho
Park, Byung-Gook
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机构:
Seoul Natl Univ, ISRC, Seoul 151742, South Korea
Seoul Natl Univ, Dept Elect Engn & Comp Sci, Seoul 151742, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
机构:
Samsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
Kim, Yoon
Seo, Joo Yun
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机构:
Seoul Natl Univ, ISRC, Seoul 151742, South Korea
Seoul Natl Univ, Dept Elect Engn & Comp Sci, Seoul 151742, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
Seo, Joo Yun
Lee, Sang-Ho
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机构:
Seoul Natl Univ, ISRC, Seoul 151742, South Korea
Seoul Natl Univ, Dept Elect Engn & Comp Sci, Seoul 151742, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea
Lee, Sang-Ho
Park, Byung-Gook
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h-index: 0
机构:
Seoul Natl Univ, ISRC, Seoul 151742, South Korea
Seoul Natl Univ, Dept Elect Engn & Comp Sci, Seoul 151742, South KoreaSamsung Elect Co, Memory Div, Flash Design Team, Hwasung 445701, South Korea