In this paper, we consider non-uniform wire-sizing under the Elmore delay model, Given a wire segment of length L, let f(x) be the width of the wire at position x, 0 less than or equal to x less than or equal to L. It was shown in [2, 5] that the optimal wire-sizing function which minimizes delay is an exponential tapering function f(x) = ae(-bx), where a > 0 and b > 0 are constants. Unfortunately, [2, 5] did not consider fringing capacitance which is at least comparable in size to area capacitance in deep submircon designs, As a result, exponential tapering is no longer the optimal strategy, In this paper we show that the optimal wire-sizing function, taking fringing capacitance into consideration, is f(x) = -c(f)/2c(0) (1/W(-c(f)/ae(-bx)) + 1) where W(x) = Sigma(n=1)(infinity)(-n)(n-1)/n!x(n) is the Lambert's W function, c(f) and c(0) are the respective Pinging capacitance and area capacitance of wire per unit square, a > 0 and b > 0 ore constants. The optimal wire-siting function degenerates into on exponential tapering function as c(f) = 0, and degenerates into a square-root tapering function (f(x) = root b-ax, where a > a and b > 0) as c(f) --> infinity. Our experimental results show that the optimal wire-siting function can significantly reduce Me interconnection delay of exponentially tapered wires. Iir the case where lower and upper bounds on the wire widths are given, the optimal wire-sizing function is a truncated version of the above function. Finally, our optimal wire-siting function can be iteratively applied to optimally size all the wire segments in a routing tree far objectives such as minimizing weighted sink delay, minimizing maximum sink delay, or minimizing area subject to delay bounds at the sinks.