Monolithic 3D neuromorphic computing system with hybrid CMOS and memristor-based synapses and neurons

被引:25
作者
An, Hongyu [1 ]
Ehsan, M. Amimul [2 ]
Zhou, Zhen [3 ]
Shen, Fangyang [4 ]
Yi, Yang [1 ]
机构
[1] Virginia Tech, Bradley Dept Elect & Comp Engn, Blacksburg, VA 24061 USA
[2] Univ Kansas, Dept Elect Engn & Comp Sci, Lawrence, KS 66045 USA
[3] Intel Corp, 3600 Juliette Ln, Santa Clara, CA 95054 USA
[4] New York City Coll Technol, Brooklyn, NY 11201 USA
关键词
Neurmorphic computing; Vertical REAM structure; Memristor; SPICE model; Monolithic 3D integration; Signal intensity encoding neuron; IMPEDANCE EXTRACTION; DESIGN; MODEL;
D O I
10.1016/j.vlsi.2017.10.009
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Because of fabrication compatibility to current semiconductor technology, three-dimensional integrated circuits (3D-ICs) offer promising near-term solutions for maintaining Moore's Law. 3D-ICs proffer high system speeds, massively parallel processing, low power consumption, and their high densities result in small footprints. In this paper, a novel 3D neuromorphic IC architecture which combines monolithic 3D integration and a synaptic array based on vertical resistive random-access memory structure (V-RRAM) is proposed. To analyze the electrical characteristics of the proposed synaptic array, a concise equivalent circuit model of the system is developed, and analytical calculations for each parameter of the equivalent circuit are provided. Moreover, a novel signal intensity encoding neuron design that can directly convert analog signal into a spiking waveform sequence is proposed and analyzed. A feasible 3D neuromorphic computing architecture is demonstrated. Applying the monolithic 3D integration technology on neuromorphic computing system hardware implementation can reduce the power consumption by 50%, and shrink die areas by 35%.
引用
收藏
页码:273 / 281
页数:9
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