High-performance energy-efficient D-flip-flop circuits

被引：53

作者：

Ko, UM ^{[1
]}

Balsara, PT

机构：

[1] Texas Instruments Inc, Dallas, TX 75266 USA

[2] Univ Texas, Dept Elect Engn, Richardson, TX 75083 USA

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2000年 / 8卷 / 01期

关键词：

circuit optimization; D-flip-flop; energy efficient; high performance;

D O I：

10.1109/92.820765

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper investigates performance, power and energy efficiency of several CMOS master-slave D-flip-flops (DFF's). To improve performance and energy efficiency, a push-pull DFF and a push-pull isolation DFF are proposed, Among the five DFF's compared, the proposed push-pull isolation circuit is found to be the fastest with the best energy efficiency, Effects of using a double-pass-transistor logic (DPL) circuit and tri-state push-pull driver are also studied, Last, metastability characteristics of the five DFF's are also analyzed.

引用

页码：94 / 98

页数：5

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