Computational Approximate Storage with Neural Network-based Error Patrol of 3D-TLC NAND Flash Memory for Machine Learning Applications

被引:3
作者
Abe, Masaki [1 ]
Matsui, Chihiro [2 ]
Mizushina, Keita [1 ]
Suzuki, Shun [1 ]
Takeuchi, Ken [1 ,2 ]
机构
[1] Chuo Univ, Dept Elect Elect & Commun Engn, Tokyo, Japan
[2] Chuo Univ, Res & Dev Initiat, Tokyo, Japan
来源
2020 IEEE INTERNATIONAL MEMORY WORKSHOP (IMW 2020) | 2020年
关键词
3D-TLC NAND flash memory; Neural network; Error patrol; Computational storage; Approximate computing;
D O I
10.1109/imw48823.2020.9108136
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes Computational Approximate Storage (CAS) for machine learning. Proposed CAS minimizes data movement from CPU/GPU to storage by offloading computation. Moreover, approximate computing is introduced for improvement of performance and power by utilizing error tolerance. To evaluate/control memory errors and thus realize CAS, this paper proposes Neural Network-based Memory Error Patrol (MEP) for 3D-TLC NAND flash memories. MEP is composed of two proposals, State Shift Error Prediction (SSEP) and Error Data Pattern Prediction (EDPP). SSEP predicts where errors occur (location of errors) and how much errors occur (degree of errors). SSEP predicts probability of VTH-down and VTH-up shifted cells and can precisely estimate bit-error rate with 2.6% errors even when affected by inter-chip variations. EDPP predicts physical origins of memory cell errors. Proposed MEP can monitor and control memory cell errors. In addition, MEP realizes the approximate computing of computational storage.
引用
收藏
页码:103 / 106
页数:4
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