Realization of an airborne radar parallel signal processing system

被引：0

作者：

Xu, JY ^{[1
]}

Wang, XT ^{[1
]}

Peng, YN ^{[1
]}

机构：

[1] Tsing Hua Univ, Dept Elect Engn, Beijing 100084, Peoples R China

来源：

2001 CIE INTERNATIONAL CONFERENCE ON RADAR PROCEEDINGS | 2001年

关键词：

airborne radar; moving target detection; parallel signal processing; real-time signal processing;

D O I：

10.1109/ICR.2001.984832

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In order to fulfil the real time signal processing tasks such as clutter rejection, moving target detection (MTD) and constant false alarm rate (CFAR) control in airborne radar, an airborne radar parallel signal processing system (ARPS2) is proposed with DSP chips as its kernel processing nodes. The DSP chips are with parallel architecture. Each node has its private input and output memory. It adopts several parallel techniques, such as parallel storage, parallel processing, parallel code loading and parallel data organization to achieve high efficiency. It has simple structure, excellent flexibility and easiness in developing. ARPS2 is going to be applied to an airborne radar, It can also be applied to perform highspeed real time signal processing algorithms in other kinds of radar.

引用

页码：792 / 795

页数：4