FPGA Implementation of HOG based Multi-Scale Pedestrian Detection

被引:0
作者
Wang, Ming-Shi [1 ]
Zhang, Zhe-Rong [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Engn Sci, Tainan, Taiwan
来源
PROCEEDINGS OF 4TH IEEE INTERNATIONAL CONFERENCE ON APPLIED SYSTEM INNOVATION 2018 ( IEEE ICASI 2018 ) | 2018年
关键词
Multi-Scale Pedestrian Detection; HOG; SVM; FPGA; FEATURE-EXTRACTION;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Pedestrian detection is needed for many vison applications including surveillance, Advanced Driver Assistance Systems (ADAS), Intelligent Transport System (ITS), drone, robotics, etc. There are different sizes of pedestrian or human in an image due to the different distances from the camera and different object's height. To detect all of the objects with different sizes, a multi-scale detector is needed. In this study, a multi-scale pedestrian detection is designed based on histogram of oriented gradients (HOG) and implement the method on a field programmable gate array (FPGA). The processing includes three stages: the input color image is converted to a gray one and then down sampled the gray image by 2 and by 4, respectively. different window sizes are used to extract the features of HOG from three size gray images. Final, linear support vector machine (SVM) is used to classify the extracted features for different window sizes. The experimental results show that the system costs 94,374 logic elements, which is about 82% of total logic elements s of Terasic DE2-115 development board. The system detection accuracy is about 97% on average and the processing speed can achieve 60 fps for 640x480 resolution.
引用
收藏
页码:1099 / 1102
页数:4
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