A novel architecture for lifting-based discrete wavelet transform for JPEG2000 standard suitable for VLSI implementation

被引:1
|
作者
Movva, S [1 ]
Srinivasan, S [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Madras 600036, Tamil Nadu, India
来源
16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS | 2003年
关键词
D O I
10.1109/ICVD.2003.1183137
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper presents a novel architecture for the implementation of a 2-D discrete wavelet transform (DWT) for image compression. The architecture is designed for lifting based DWT. The advantages of the lifting based DWT and its inverse, IDWT over the convolution based scheme are lower computational complexity and reduced memory requirements. Hence, the lifting based DWT and IDWT implementations are faster consume less power and occupy smaller area compared to the implementations based on the convolution scheme. Optimum architecture has been arrived at after conducting a thorough analysis of data inter-dependencies, lifetime and flow. Reduction of scaling coefficient multiplications has also been effected. CSD arithmetic has been incorporated in the architecture in order to speed up the implementation. The hardware has been implemented for the image blocks of size 9x9 pixels based on single sample overlap scheme as recommended in the JPEG2000 standard.
引用
收藏
页码:202 / 207
页数:6
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