Temperature evaluation of conventional, SOI, and DSOI MOSFETs using non-equilibrium energy model

Due to parasitical effects in bulk MOSFETs, new MOSFETs such as SOI and DSOI were proposed. It is necessary to accurately simulate these devices to demonstrate their performance to improve their design. A two-dimensional steady-state non-equilibrium energy model is used to analyze the sub-micron conventional, SOI, and DSOI MOSFETs in this article. An electron-optical phonon acoustic-phonon scattering (EOAS) model is applied to describe energy transport. On a case study of the n-channel MOSFET with 0.3-mu m gate length, the distributions of electrostatic potential, charge number densities and velocities, electron temperature, as well as phonon temperatures are obtained. The maximum temperature in SOI MOSFET is much larger than that in conventional MOSFET, while the top temperature disparity between the conventional MOSFET and DSOI MOSFET is much smaller. The relationship between electrical current, phonon temperature, and drain-source bias in these MOSFETs proved that the DSOI MOSFET show better electrical and thermal function as expected.