A novel fault tolerant majority gate in quantum-dot cellular automata to create a revolution in design of fault tolerant nanostructures, with physical verification

There are some challenges in CMOS circuits, one of the most important of which is the size of the feature. Alternative technologies such as quantum-dot cellular automata (QCA) are emerging to solve this problem. In QCA, the scale of main structures is very small, which can cause faults. There are several ways to overcome this problem. One of them is the design and use of the fault-tolerant majority gates. The majority gate is one of the most widely used components in designing QCA structures. In this paper, we propose a new fault-tolerant majority gate. We investigate the performance of the proposed structure when common faults occur, and then we compare the results with previous structures. Using this structure, we propose a new structure for a fault-tolerant full-adder. QCADesigner is used to implement and simulate proposed structures. Physical verification is used to confirm the results. (C) 2018 Elsevier B.V. All rights reserved.