An 11-bit 8.6GHz Direct Digital Synthesizer MMIC with 10-bit Segmented Nonlinear DAC

被引:3
作者
Geng, Xueyang [1 ]
Yu, Xuefeng [1 ]
Dai, Fa Foster [1 ]
Irwin, J. David [1 ]
Jaeger, Richard C. [1 ]
机构
[1] Auburn Univ, Dept Elect & Comp Sci, Auburn, AL 36849 USA
来源
ESSCIRC 2008: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE | 2008年
关键词
FREQUENCY;
D O I
10.1109/ESSCIRC.2008.4681867
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a low power, high speed and high resolution SiGe DDS MMIC with 11-bit phase and 10-bit amplitude resolutions. Using more than twenty thousand transistors, including an 11-bit pipeline accumulator, a 6-bit coarse DAC and seven 3-bit fine DACs, the core area of the DDS is 3 x 2.5mm(2). The maximum clock frequency was measured at 8.6GHz with 4.2958GHz output. The DDS consumes a power of 4.8W under a 3.3V power supply. It achieves the best reported phase and amplitude resolutions and the best power efficiency figure of merit (FOM) 182GHz.2(ENOB)/W. The measured SFDR is approximately 40dBc with 4.2958GHz Nyquist output and 48dBc with 4.2MHz output at the maximum clock frequency of 8.6GHz. The chip was measured using LCC-52 packages.
引用
收藏
页码:362 / 365
页数:4
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