Wideband Dual-Injection Path Self-Interference Cancellation Architecture for Full-Duplex Transceivers

被引:54
|
作者
Zhang, Tong [1 ]
Su, Chenxin [1 ]
Najafi, Ali [1 ]
Rudell, Jacques Christophe [1 ]
机构
[1] Univ Washington, Dept Elect Engn, Seattle, WA 98195 USA
基金
美国国家科学基金会;
关键词
Adaptive finite-impulse response (FIR) filters; CMOS integrated circuits; delay lines; fifth generation (5G) mobile communication; interference cancellation; radio frequency; radio spectrum management; CMOS; 5G; AMPLIFIERS; NETWORKS; DESIGN; MIMO;
D O I
10.1109/JSSC.2018.2805874
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A transceiver front end including a dual-injection path self-interference (SI) cancellation architecture is proposed for use in wideband full-duplex networks. The SI cancellation circuitry is implemented using: 1) one feed-forward cancellation path containing a five-tap analog adaptive finite-impulse response (FIR) filter between the transmitter (TX) output and the receiver (RX) input; 2) a second baseband (BB) cancellation path containing a 14-tap low-frequency FIR filter with a point of injection at the RX BB output; 3) a phase noise cancellation method that suppresses the reciprocal mixing products associated with the downconversion in the BB cancellation path for the TX SI signal; and 4) an integrated noise cancelling power amplifier (PA). A prototype of 40-nm TSMC device was fabricated, which demonstrates more than 50-dB SI cancellation over 42-MHz bandwidth and a 10-dB attenuation of TX SI phase noise in the RX signal path. The two cancelling filters dissipate 11.5 mW, with a measured P-1dB and IIP3 of 27/26.5 and 36/34.5 dBm, respectively. The RX noise figure is degraded by less than 1.55 dB, when both cancellers are enabled. The PA has a measured output of P-1dB/P-sat of 25.1/26.5 dBm, respectively. The total chip die area is 3.5 mm(2) with an overall transceiver power consumption of 49 mW, excluding the integrated PA.
引用
收藏
页码:1563 / 1576
页数:14
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