Low-distance path-based multicast routing algorithm for network-on-chips

被引:33
作者
Daneshtalab, M. [1 ,3 ]
Ebrahimi, M. [2 ,3 ]
Mohammadi, S. [1 ]
Afzali-Kusha, A. [1 ]
机构
[1] Univ Tehran, Nanoelect Ctr Excellence, Sch Elect & Comp Engn, Tehran, Iran
[2] Islamic Azad Univ, Dept Comp Engn, Sci & Res Branch, Tehran, Iran
[3] Univ Turku, Dept Informat Technol, Turku, Finland
关键词
WORMHOLE; COMMUNICATION;
D O I
10.1049/iet-cdt.2008.0086
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this study, a low-distance path-based multicast routing algorithm for network-on-chips (NoCs) and multiprocessor systems-on-chip is proposed. The algorithm, which is based on the mesh topology, makes use of network partitioning, optimised destination ordering and the odd-even turn model adaptive routing technique for both the multicast and unicast messages. Additionally, the algorithm invokes non-congested paths in routing the messages to prevent creating highly congested areas. This is achieved by considering the congestion condition of the input ports. The efficiency of the proposed multicast routing algorithm is evaluated by comparing its performance with those of previously proposed algorithms under both multicast and mixed (mixture of unicast and multicast) traffic models. The results show that the proposed technique has lower average delays and lower average and peak power consumptions compared to those of the other path-based multicasting algorithm for different message injection rates. The technique has a hardware overhead of less than 8%.
引用
收藏
页码:430 / 442
页数:13
相关论文
共 29 条
[1]  
Al-Dubai A, 2006, PAR ELEC 2006: INTERNATIONAL SYMPOSIUM ON PARALLEL COMPUTING IN ELECTRICAL ENGINEERING, PROCEEDINGS, P245
[2]  
AZEVEDO M, 1996, P INT C ICDCS HONG K, P249
[3]   Resource deadlocks and performance of wormhole multicast routing algorithms [J].
Boppana, RV ;
Chalasani, S ;
Raghavendra, CS .
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 1998, 9 (06) :535-549
[4]  
BOPPANA RV, 1993, P INT S COMP ARCH MA, P351
[5]  
CARARA EA, 2008, P ISVLSI, P341
[6]  
Carloni Luca P, 2008, P 6 IEEE ACM IFIP IN, P215
[7]   Multiprocessor SoC platforms:: A component-based design approach [J].
Cesário, WO ;
Lyonnard, D ;
Nicolescu, G ;
Paviot, Y ;
Yoo, SJ ;
Jerraya, AA ;
Gauthier, L ;
Diaz-Nava, M .
IEEE DESIGN & TEST OF COMPUTERS, 2002, 19 (06) :52-63
[8]   The odd-even turn model for adaptive routing [J].
Chiu, GM .
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2000, 11 (07) :729-738
[9]  
Dally WJ., 2004, PRINCIPLES PRACTICES
[10]   Distributing congestions in NoCs through a dynamic routing algorithm based on input and output selections [J].
Daneshtalab, M. ;
Pedram, A. ;
Neishaburi, M. H. ;
Riazati, M. ;
Afzali-Kusha, A. ;
Mohammadi, S. .
20TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: TECHNOLOGY CHALLENGES IN THE NANOELECTRONICS ERA, 2007, :546-+