Random Interleaved Pipeline Countermeasure Against Power Analysis Attacks

被引：0
|
作者：
Menicocci, Renato [1 ]
Trifiletti, Alessandro [2 ]
Trotta, Francesco [2 ]
机构：
[1] Fdn Ugo Bordoni, Rome, Italy
[2] Sapienza Univ Roma, Dipartmento Ingn Informaz Elect & Telecommun, Rome, Italy
来源：
2013 9TH CONFERENCE ON PH. D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME 2013) | 2013年
关键词：
Side Channel Attack; DPA; CPA; RTL countermeasure; AES; FPGA;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An RTL countermeasure intended to protect the AddRoundKey and SubByte steps of the AES algorithm against DPA or CPA attacks has been proposed and tested on an AES encoding coprocessor implemented on FPGA. Experimental results based on first order CPA attacks confirmed the effectiveness of the proposed countermeasure, especially in protecting the SBOX output, showing that even with the acquisition of 300000 power curves, the absolute value of correlation function is embedded in the measured noise floor and there are no peaks able to reveal the encryption key.
引用
收藏
页码：145 / 148
页数：4
相关论文
共 50 条
  • [41] Logic Locking With Provable Security Against Power Analysis Attacks
    Sengupta, Abhrajit
    Mazumdar, Bodhisatwa
    Yasin, Muhammad
    Sinanoglu, Ozgur
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39 (04) : 766 - 778
  • [42] Dependability Analysis of a Countermeasure against Fault Attacks by means of Laser Shots onto a SRAM-based FPGA
    Canivet, G.
    Maistri, P.
    Leveugle, R.
    Valette, F.
    Clediere, J.
    Renaudin, M.
    21ST IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, 2010,
  • [43] Destroying Fault Invariant with Randomization A Countermeasure for AES Against Differential Fault Attacks
    Tupsamudre, Harshal
    Bisht, Shikha
    Mukhopadhyay, Debdeep
    CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2014, 2014, 8731 : 93 - 111
  • [44] Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs
    McEvoy, Robert P.
    Murphy, Colin C.
    Marnane, William P.
    Tunstall, Michael
    ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, 2009, 2 (01)
  • [45] Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
    Coron, Jean-Sebastien
    Kizhvatov, Ilya
    CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2010, 2010, 6225 : 95 - 109
  • [46] An efficient modular exponentiation algorithm against simple power analysis attacks
    Sun, Da-Zhi
    Huai, Jin-Peng
    Sun, Ji-Zhou
    Cao, Zhen-Fu
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2007, 53 (04) : 1718 - 1723
  • [47] Countermeasures against Power Analysis Attacks for the NTRU Public Key Cryptosystem
    Lee, Mun-Kyu
    Song, Jeong Eun
    Choi, Dooho
    Han, Dong-Guk
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2010, E93A (01) : 153 - 163
  • [48] A randomised scheme for secured modular exponentiation against power analysis attacks
    Barman M.
    Mahanta H.J.
    Cyber-Physical Systems, 2019, 5 (04): : 209 - 230
  • [49] Using Randomization in Exponentiation Based Algorithms against Power Analysis Attacks
    Mahanta, Hridoy Jyoti
    Khan, Ajoy Kumar
    2016 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, COMPUTING AND COMMUNICATIONS (MICROCOM), 2016,
  • [50] A Hardware-Friendly Shuffling Countermeasure Against Side-Channel Attacks for Kyber
    Xu, Dejun
    Wang, Kai
    Tian, Jing
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2025, 72 (03) : 504 - 508
12345