A 20GS/s 8-Bit Current Steering DAC in 0.25μm SiGe BiCMOS Technology

被引：9

作者：

Halder, Samiran ^{[1
]}

Gustat, Hans ^{[1
]}

Scheytt, Christoph ^{[1
]}

Thiede, Andreas ^{[2
]}

机构：

[1] IHP Microelect, Dept Circuit Design, 25 Technol Pk, D-15236 Frankfurt, Oder, Germany

[2] Univ Paderborn, Chair High Freq Elect, D-33098 Paderborn, Germany

来源：

2008 EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC) | 2008年

关键词：

D O I：

10.1109/EMICC.2008.4772250

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the design of an 8-bit 20GS/s DAC. The DAC is implemented with a modified current steering architecture where unlike the conventional binary weighted architecture a R-2R ladder DAC architecture is used as the LSB sub-DAC. In simulation the 8-bit DAC shows 7.83 ENOB for 9GHz of input sinusoidal at 20GHz of sampling rate with the power dissipation of 2.5W. The measurement results of the 4-bit LSB sub-DAC show that the sub-DAC can work up to 30GHz with a power dissipation of 455mW.

引用

页码：147 / +

页数：2

共 10 条

[1]

[Anonymous], 2001, SELECTED TOPICS ELEC

[2]

BARANAUSKAS D, 2006, P ISSCC, P580

[3] A 3b 40GS/s ADC-DAC in 0.12μm SiGe [J].

Cheng, W ;

Ali, W ;

Choi, MJ ;

Liu, K ;

Tat, T ;

Devendorf, D ;

Linder, L ;

Stevens, R .

2004 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 2004, 47 :262-263

[4]

ELSAID M, 2005, P ISSCC, P224

[5] SPUR-REDUCED DIGITAL SINUSOID SYNTHESIS [J].

FLANAGAN, MJ ;

ZIMMERMAN, GA .

IEEE TRANSACTIONS ON COMMUNICATIONS, 1995, 43 (07) :2254-2262

[6] NOR/OR register based ECL circuits for maximum data rate [J].

Gustat, H ;

Borngräber, J .

Proceedings of the 2005 BIPOLAR/BiCMOS Circuits and Technology Meeting, 2005, :90-93

[7]

Heinemann B, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P775, DOI 10.1109/IEDM.2002.1175953

[8] High speed Direct Digital Synthesis techniques and applications. [J].

Larson, DC .

GAAS IC SYMPOSIUM - 20TH ANNUAL, TECHNICAL DIGEST 1998, 1998, :209-212

[9] A 3V CMOS 400mW 14b 1.4GS/S DAC for multi-carrier applications [J].

Schafferer, B ;

Adams, R .

2004 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 2004, 47 :360-361

[10] A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter [J].

Van den Bosch, A ;

Borremans, MAF ;

Steyaert, MSJ ;

Sansen, W .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (03) :315-324

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