Adaptive multiple resolution CMOS active pixel sensor

被引：0

作者：

Artyomov, E ^{[1
]}

Yadid-Pecht, O ^{[1
]}

机构：

[1] Ben Gurion Univ Negev, VLSI Syst Ctr, IL-84105 Beer Sheva, Israel

来源：

2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4, PROCEEDINGS | 2004年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A smart image sensor with adaptive multiple resolution ability is presented. This sensor is based on the Quadtree Decomposition algorithm, which decomposes an image into square homogeneous regions. After the image is segmented, only the value of the block and its size are stored or transmitted. On chip implementation can solve the information bottleneck problem by reducing the amount of data for transmission. Good compression results can be achieved for scenes with predominant background. The algorithm is implemented on chip in a mixed signal, column parallel architecture in 0.35mum 4M2P n-well TSMC CMOS technology available through MOSIS. Typical power dissipation for the test chip with 32x32 pixels is 70mW at VDD = 3.3V.

引用

页码：836 / 839

页数：4

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