Variation aware design of controlled voltage swing ring oscillator

An inverter is designed using an innovative controlled voltage swing logic and having two different current sources. The logic levels are detected by sensing the voltage drop across a termination resistance. Logic 1 is defined when both the current sources are pumping current through termination resistance, whereas a logic 0 is determined when one of the sources is pumping current. This inverter is the newest class of inverter and used in designing a ring oscillator, capable of operating at various frequencies, f(osc). Varying the external load capacitance (C-L) from 1 to 10 fF, the values of f(osc) are tuned in between 0.8 and 1.0 GHz. Mathematical equations relating f(osc) as a function of C-L and intrinsic capacitive components (Theta) are obtained and subsequently validated using gpdk 90 nm technology CMOS process. The proposed controlled voltage swing ring oscillator is observed to draw a current of 0.716 mu A at f(osc) close to 1.0 GHz. The corresponding C-L and the Theta happen to be 1.0 and 53.8 fF, respectively. The effect on f(osc) due to layout geometries and other process parameters keep on changing only by 16% compared to a 7% change in the intrinsic values between pre and post layout for the said ring oscillator. Lastly, a linear empirical relation is obtained to indicate f(osc) as a function of both C-L and the power supply voltage (Vdd).