Modeling complex via hole structures

被引：38
作者：
Laermans, E [1 ]
De Geest, J
De Zutter, D
Olyslager, F
Sercu, S
Morlion, D
机构：
[1] Univ Ghent, Dept Informat Technol, INTEC, B-9000 Ghent, Belgium
[2] FCI Elect, NL-5202 sHertogenbosch, Netherlands
来源：
IEEE TRANSACTIONS ON ADVANCED PACKAGING | 2002年 / 25卷 / 02期
关键词：
network models; signal integrity; via holes;
D O I：
10.1109/TADVP.2002.803310
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
We derive a physics-based circuit model for complex via hole structures in printed circuit boards. The via hole is modeled as a cascade of capacitance and inductance matrices. Capacitance values are computed using a three-dimensional electrostatic solver and inductance values are computed from a two-dimensional quasi-TEM solver. This model is valid at frequencies up to a few gigahertz for typical via hole geometries, where the return current follows a well defined path.
引用
收藏
页码：206 / 214
页数：9
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  • [1] TIME-DOMAIN ELECTROMAGNETIC ANALYSIS OF INTERCONNECTS IN A COMPUTER CHIP PACKAGE
    BECKER, WD
    HARMS, PH
    MITTRA, R
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1992, 40 (12) : 2155 - 2163
  • [2] FDTD ANALYSIS OF HIGH-FREQUENCY ELECTRONIC INTERCONNECTION EFFECTS
    CHERRY, PC
    ISKANDER, MF
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1995, 43 (10) : 2445 - 2451
  • [3] COUPLED NOISE-ANALYSIS FOR ADJACENT VIAS IN MULTILAYERED DIGITAL CIRCUITS
    GU, QZ
    TASSOUDJI, MA
    POH, SY
    SHIN, RT
    KONG, JA
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 1994, 41 (12): : 796 - 804
  • [4] MODELING AND ANALYSIS OF VIAS IN MULTILAYERED INTEGRATED-CIRCUITS
    GU, QZ
    YANG, YE
    TASSOUDJI, MA
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1993, 41 (02) : 206 - 214
  • [5] CAPACITANCE OF A CIRCULAR SYMMETRICAL MODEL OF A VIA HOLE INCLUDING FINITE GROUND PLANE THICKNESS
    KOK, P
    DEZUTTER, D
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1991, 39 (07) : 1229 - 1234
  • [6] PREDICTION OF THE EXCESS CAPACITANCE OF A VIA-HOLE THROUGH A MULTILAYERED BOARD INCLUDING THE EFFECT OF CONNECTING MICROSTRIPS OR STRIPLINES
    KOK, PA
    DEZUTTER, D
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1994, 42 (12) : 2270 - 2276
  • [7] LEAST-SQUARE ESTIMATION OF THE EQUIVALENT-CIRCUIT PARAMETERS OF A VIA-HOLE FROM A TDR REFLECTOGRAM, INCLUDING ON-BOARD RISE-TIME AND DELAY ESTIMATION
    KOK, PA
    DEZUTTER, D
    [J]. IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1993, 16 (03): : 292 - 299
  • [8] ISCALAR MAGNETOSTATIC POTENTIAL APPROACH TO THE PREDICTION OF THE EXCESS INDUCTANCE OF GROUNDED VIAS AND VIAS THROUGH A HOLE IN A GROUND PLANE
    KOK, PA
    DEZUTTER, D
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1994, 42 (07) : 1229 - 1237
  • [9] Modeling differential via holes
    Laermans, E
    De Geest, J
    De Zutter, D
    Olyslager, F
    Sercu, S
    Morlion, D
    [J]. IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2001, 24 (03): : 357 - 363
  • [10] Modelling differential via holes
    Laermans, E
    De Geest, J
    De Zutter, D
    Olyslager, F
    Sercu, S
    Morlion, D
    [J]. ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2000, : 127 - 130
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