Cost-effective integration of an FN-programmed embedded flash memory into a 0.25 μm SiGe:C RF-BiCMOS technology

被引:2
|
作者
Fox, A.
Ehwald, K. E.
Schley, P.
Barth, R.
Marschmeyer, S.
Wolf, C.
Stikanov, V. E.
Gromovyy, A.
Hudyryev, A.
机构
[1] IHP Microelect, D-15236 Frankfurt, Germany
[2] Natl Tech Univ Ukraine KPI, CAD Dept, UA-03056 Kiev, Ukraine
关键词
embedded flash memory; Fowler-Nordheim; SiGe; BiCMOS;
D O I
10.1016/j.mejo.2006.07.018
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a process technology for cost-effective integration of low-power flash memories into a 0.25 mu m, high performance SiGe:C RF-BiCMOS process. Only four additional lithographic steps are used on top of the baseline BiCMOS process, leading to in total 23 mask levels for the BiCMOS/embedded flash process. Uniform-channel Fowler-Nordheim programmable and erasable stacked-gate cells, suitable for medium density (similar to Mbit) memories, are demonstrated. Peripheral high-voltage transistors, with > 10 V breakdown voltage, are integrated without additional mask steps on top of the flash cell integration. The flash memory integration is modular and has negligible impact on the original CMOS and HBT device parameters. (c) 2006 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1194 / 1199
页数:6
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