A Bi-flyback PFC converter with low intermediate bus voltage and tight output voltage regulation for universal input applications

被引:13
作者
Qiu, WH [1 ]
Wu, WK [1 ]
Luo, SG [1 ]
Gu, W [1 ]
Batarseh, I [1 ]
机构
[1] Univ Cent Florida, Sch Elect Engn & Comp Sci, Orlando, FL 32816 USA
来源
APEC 2002: SEVENTEENTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1 AND 23 | 2002年
关键词
D O I
10.1109/APEC.2002.989256
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
A single-stage Bi-flyback power factor correction topology is proposed in this paper. By adding a secondary winding to BIFRED choke inductor, there are two discharging paths for choke inductor: to load or to intermediate capacitor. In this topology, the intermediate bus voltage will be limited to below 400VDC for universal voltage applications, and DC/DC conversion cell can operate in CCM. A 150W prototype unit based on this topology has been built and tested in the lab with experimental results that show good performance.
引用
收藏
页码:256 / 262
页数:7
相关论文
共 9 条
  • [1] García O, 2001, IEEE POWER ELECTRON, P8, DOI 10.1109/PESC.2001.953987
  • [2] JIANG YM, 1993, APPL POWER ELECT CO, P287, DOI 10.1109/APEC.1993.290618
  • [3] JIN C, 2001, PESC 2001, V2, P660
  • [4] LUO S, 2001, THESIS U CENTRAL FLO
  • [5] MADIGAN M, 1992, P IEEE PESC 92, V2, P1043
  • [6] QIAO C, 2000, APEC 2000 15 IEEE AN, V1, P460
  • [7] REDL R, 1994, IEEE POWER ELECTRON, P1137, DOI 10.1109/PESC.1994.373825
  • [8] WILLERS MJ, 1994, IECON 94, V1, P226
  • [9] WU W, IN PRESS APEC 2002