Low-power C-R hybrid D/A conversion network for SAR A/D converter

被引：0

作者：

Tong, X. Y. ^{[1
]}

Li, F. X. ^{[1
]}

机构：

[1] Xian Univ Posts & Telecommun, Sch Elect Engn, Xian 710121, Shannxi, Peoples R China

来源：

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2014年 / 80卷 / 01期

基金：

中国国家自然科学基金;

关键词：

Successive-approximation-register (SAR); D/A conversion network; Low-power; CMOS;

D O I：

10.1007/s10470-014-0315-z

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

An energy-efficient D/A conversion structure combined with a splited unit-capacitor array and an intermittent-sleeping resistor string is presented for low power SAR A/D converter. The energy dissipation and the matching requirement of the D/A conversion network are researched based on Matlab modeling. And its superiority and applicability are proven by the realization of an 8-bit 200kS/s 25.6 mu W 65 nm CMOS SAR A/D converter with this proposed D/A structure.

引用

页码：159 / 162

页数：4

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