High-κ Dielectrics and Interface Passivation for Ge and III/V Devices on Silicon for advanced CMOS

被引:2
|
作者
Heyns, Marc [1 ]
Bellenger, Florence [1 ]
Brammertz, Guy [1 ]
Caymax, Matty [1 ]
De Jaeger, Brice [1 ]
Delabie, Annelies [1 ]
Eneman, Geert [1 ]
Houssa, Michel [2 ]
Lin, Dennis [1 ]
Martens, Koen [1 ]
Merckling, Clement [1 ]
Meuris, Marc [1 ]
Mitard, Jerome [1 ]
Penaud, Julien [3 ]
Pourtois, Geoffrey [1 ]
Scarrozza, Marco [1 ]
Simoen, Eddy [1 ]
Sioncke, Sonja [1 ]
Van Elshocht, Sven [1 ]
Wang, Wei-E [4 ]
机构
[1] IMEC, B-3001 Leuven, Belgium
[2] Katholieke Univ Leuven, Dept Phys, B-3001 Leuven, Belgium
[3] Riber Assignee IMEC, B-3001 Leuven, Belgium
[4] INTEL Assignee IMEC, B-3001 Leuven, Belgium
关键词
MOLECULAR-BEAM EPITAXY; GATE; SEMICONDUCTORS; SEGREGATION; MOSFET;
D O I
10.1149/1.3206606
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
The use of Ge and III/V materials for future CMOS applications is investigated. Passivation of the Ge surface can be obtained by either GeO2 or a thin Si layer. Short channel Ge pMOS devices with low EOT are fabricated. The passivation of III/V materials is a very challenging topic. Some critical issues and passivation schemes are investigated and the performance of inversion channel MOSFET's on In0.53Ga0.47As with ALD Al2O3 is discussed.
引用
收藏
页码:51 / 65
页数:15
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